Metal-Oxide-Semiconductor Fields Effect Transistors (MOSFETs)

Metal-Oxide-Semiconductor Fields Effect Transistors (MOSFETs)

Metal-OxideSemiconductor Fields Effect Transistors (MOSFETs) From Prof. J. Hopwood Structure: n-channel MOSFET (NMOS) body B source S gate G IG=0 drain D ID=IS IS

metal oxide n+ p L n+ W Circuit Symbol (NMOS) D G ID= IS B IG= 0 IS S

(IB=0, should be reverse biased) VGS = 0 n+pn+ structure ID = 0 body B source S gate G - + drain D VD>Vs metal oxide n+ p

L n+ W 0 < VGS < Vt n+-depletion-n+ structure ID = 0 body B source S gate G - + drain D VD>Vs +++ metal

oxide n+ p L n+ W VGS > Vt n+-n-n+ structure ID > 0 body B source S n+ gate G - +

+++ +++ +++ metal oxide ----p L drain D VD>Vs n+ W Summary Vt is the threshold voltage If VGS < Vt, then there is insufficient positive charge on the gate to invert the p-type region This is called cut-off

If VGS> Vt, then there is sufficient charge on the gate to attract electrons and invert the p-type region, creating an n-channel between the source and drain The MOSFET is now on 2 modes of operation: triode and saturation Triode Region A voltage-controlled resistor @small VDS B S D - + +++ +++ metal - oxide - - - n+ B

S p VGS1>Vt n+ increasing VGS D -+ +++ +++ +++ metal - -oxide - - -- n+ ID

p VGS2>VGS1 G n+ cut-off B S n+ D -+ +++ +++ +++ +++ metal - - -oxide -----p VGS3>VGS2

n+ VDS 0.1 v Increasing VGS puts more charge in the channel, allowing more drain current to flow Saturation Region occurs at large VDS As the drain voltage increases, the difference in voltage between the drain and the gate becomes smaller. At some point, the difference is too small to maintain the channel near the drain pinch-off body B source S gate G - +

drain D VD>>Vs +++ +++ +++ metal oxide n+ p n+ Saturation Region occurs at large VDS The saturation region is when the MOSFET experiences pinch-off. Pinch-off occurs when VG - VD is less than Vt. body B

source S gate G - + drain D VD>>Vs +++ +++ +++ metal oxide n+ p n+ Saturation Region

occurs at large VDS VG - VD < Vt VGS - VDS < Vt VDS > VGS - Vt body B source S gate G - + drain D VD>>Vs +++ +++ +++ metal oxide

n+ p n+ Saturation Region once pinch-off occurs, there is no further increase in drain current ID saturation triode increasing VGS VDS>VGS-Vt VDS

iD = iS = 0 Triode: vGS>Vt and vDS < vGS-Vt iD = kn(W/L)[(vGS-Vt)vDS - 1/2vDS2] Saturation: vGS>Vt and vDS > vGS-Vt iD = 1/2kn(W/L)(vGS-Vt)2 where kn= (electron mobility)x(gate capacitance) = n(ox/tox) electron velocity = nE and Vt depends on the doping concentration and gate material used Electrostatic Discharge (ESD) The gate oxide is very thin tox < 10 nm (10x10-9 m) It is very easy for static electricity to destroy this very thin insulating layer Must practice precautions, such as wrist straps and static free work areas Parasitic Capacitance Notice that the entire gate structure looks exactly like a capacitor (metal-insulator-semiconductor) This parasitic capacitance at the gate allows current to flow at high frequencies! iG > 0 as frequency increases and, just like other semiconductor devices, the parasitic

capacitance limits the speed of the device (turning the MOSFET on requires charging the gate capacitance). The RsigCgate time constant tells us the signal delay for digital circuits and the upper cut-off frequency for analog circuits. Conclusion For the remainder of the class, we will look at the behavior of semiconductor devices in much more detail Occasionally, you might get caught-up in the details! Please refer back to this overview to see how it all fits together.

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